1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a circuit for detecting boosted voltage in a semiconductor device and a method of controlling the same.
2. Description of the Related Art
In general, a semiconductor memory device includes a boosted voltage generating circuit that generates a boosted voltage that is greater than the external supply voltage, and a boosted voltage detecting circuit that controls the boosted voltage generating circuit. A boosted voltage is mainly used as supply voltage when word lines in a semiconductor memory device are activated. An example of the boosted voltage generating circuit is disclosed in U.S. Pat. No. 6,172,932 B1.
FIG. 1 is a circuit diagram of a conventional boosted voltage generating circuit 11 and circuits related thereto, which are included in a semiconductor memory device. As illustrated in FIG. 1, the boosted voltage generating circuit 11 is controlled by a boosted voltage detecting circuit 13 and an oscillator 15. The boosted voltage generating circuit 11 generates a boosted voltage VPP in response to an oscillation signal OSC. The boosted voltage detecting circuit 13 detects the boosted voltage VPP and generates detection signal VPPOSCE in response to the detected boosted voltage VPP and a reference voltage VREFA. The oscillator 15 generates an oscillation signal OSC in response to the detection signal VPPOSCE.
More specifically, as illustrated in FIGS. 2A and 2B, the boosted voltage detecting circuit 13 generates a control signal for reboosting the boosted voltage VPP. In other words, a detection signal VPPOSCE is generated by the boosted voltage detecting circuit 13 when the boosted voltage VPP reaches or drops below a target voltage TARGET-VPP and reaches a predetermined level VPP(MIN).
FIGS. 2A and 2B are waveform diagrams of a boosted voltage VPP changing in response to a detection signal VPPOSCE. FIG. 2A illustrates a case where the response speed of the boosted voltage detecting circuit 13 illustrated in FIG. 1 is high, and FIG. 2B illustrates a case where the response speed of the boosted voltage detecting circuit 13 is low.
In general, during a self-refresh operation, all of word lines are activated in a semiconductor memory device and thus the amount of a boosted voltage VPP and current consumed is greater than in an active operation. Thus, in order to reduce the consumption of current during the self-refresh operation, it is required to reduce the amount of current that is to be consumed by the boosted voltage detecting circuit 13.
However, in this case, since the response speed of the boosted voltage detecting circuit 13 is slow (T1<T2) as illustrated in FIG. 2B, a ripple VPP(MAX)-VPP(MIN) in the boosted voltage VPP is increased. An increase in the ripple of the boosted voltage VPP results in an increase in the average value of the boosted voltage VPP, thus increasing the amount of current consumed in generating the boosted voltage VPP.